? 一种面向数据流架构的高效片上路由结构
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Journal of Computer Science and Technology 2017, Vol. 32 Issue (1) :11-25    DOI: 10.1007/s11390-017-1703-5
Special Section on Dataflow Architecture << Previous Articles | Next Articles >>
一种面向数据流架构的高效片上路由结构
Xiao-Wei Shen1,2(申小伟), Student Member, CCF, Xiao-Chun Ye1,*(叶笑春), Member, CCF, Xu Tan1,2(谭旭), Student Member, CCF, Da Wang1(王达), Member, CCF, Lunkai Zhang3(张轮凯), Wen-Ming Li1(李文明), Member, CCF, Zhi-Min Zhang1(张志敏), Senior Member, CCF, Dong-Rui Fan1(范东睿), Senior Member, CCF, and Ning-Hui Sun1(孙凝晖), Fellow, CCF
1 State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences Beijing 100190, China;
2 School of Computer and Control Engineering, University of Chinese Academy of Sciences, Beijing 100049, China;
3 Department of Computer Science, The University of Chicago, IL 60637, U.S.A
An Efficient Network-on-Chip Router for Dataflow Architecture
Xiao-Wei Shen1,2(申小伟), Student Member, CCF, Xiao-Chun Ye1,*(叶笑春), Member, CCF, Xu Tan1,2(谭旭), Student Member, CCF, Da Wang1(王达), Member, CCF, Lunkai Zhang3(张轮凯), Wen-Ming Li1(李文明), Member, CCF, Zhi-Min Zhang1(张志敏), Senior Member, CCF, Dong-Rui Fan1(范东睿), Senior Member, CCF, and Ning-Hui Sun1(孙凝晖), Fellow, CCF
1 State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences Beijing 100190, China;
2 School of Computer and Control Engineering, University of Chinese Academy of Sciences, Beijing 100049, China;
3 Department of Computer Science, The University of Chicago, IL 60637, U.S.A

摘要
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摘要 在高性能计算领域中,数据流结构有较多的优势。在数据流计算模式中,大量的操作数需要通过片上网络在不同处理单元中传输。因此路由的设计对数据流结构的性能具有较大的影响。常见的路由是面向控制流多核处理器设计的,它们都不适合数据流结构。本文首先分析了数据流结构中片上网络的传输特征:多目的地,高注入率和性能对延迟敏感。基于这三项特征,本文提出了一种新型的面向数据流结构的片上网络路由结构,通过多目的地机制来实现单个数据多目的地的传输,通过输出缓冲机制提高路由的吞吐率,通过非分片机制来最小化路由传输时间。实验结果表明,相比现有面向控制流的路由结构,本文提出的路由结构将数据流结构的性能提高了3.6倍。
关键词多目的地   路由   片上网络   数据流结构   高性能计算     
Abstract: Dataflow architecture has shown its advantages in many high-performance computing cases. In dataflow computing, a large amount of data are frequently transferred among processing elements through the network-on-chip (NoC). Thus the router design has a significant impact on the performance of dataflow architecture. Common routers are designed for control-flow multi-core architecture and we find they are not suitable for dataflow architecture. In this work, we analyze and extract the features of data transfers in NoCs of dataflow architecture:multiple destinations, high injection rate, and performance sensitive to delay. Based on the three features, we propose a novel and efficient NoC router for dataflow architecture. The proposed router supports multi-destination; thus it can transfer data with multiple destinations in a single transfer. Moreover, the router adopts output buffer to maximize throughput and adopts non-flit packets to minimize transfer delay. Experimental results show that the proposed router can improve the performance of dataflow architecture by 3.6x over a state-of-the-art router.
Keywordsmulti-destination   router   network-on-chip   dataflow architecture   high-performance computing     
Received 2016-09-02;
本文基金:

This work was supported by the National High Technology Research and Development 863 Program of China under Grant No. 2015AA01A301, the National Natural Science Foundation of China under Grant No. 61332009, the National HeGaoJi Project of China under Grant No. 2013ZX0102-8001-001-001, and the Beijing Municipal Science and Technology Commission under Grant Nos. Z15010101009 and Z151100003615006.

通讯作者: Xiao-Chun Ye     Email: yexiaochun@ict.ac.cn
About author: Xiao-Wei Shen received his Bachelor's degree in computer science and technology from the School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan, in 2010. He is currently a Ph. D. candidate in University of Chinese Academy of Sciences, Beijing. His main research interests include processor micro-architecture and high-performance computer systems.
引用本文:   
Xiao-Wei Shen, Xiao-Chun Ye, Xu Tan, Da Wang, Lunkai Zhang, Wen-Ming Li, Zhi-Min Zhang, Dong-Rui Fan, Ning-Hui Sun.一种面向数据流架构的高效片上路由结构[J]  Journal of Computer Science and Technology , 2017,V32(1): 11-25
Xiao-Wei Shen, Xiao-Chun Ye, Xu Tan, Da Wang, Lunkai Zhang, Wen-Ming Li, Zhi-Min Zhang, Dong-Rui Fan, Ning-Hui Sun.An Efficient Network-on-Chip Router for Dataflow Architecture[J]  Journal of Computer Science and Technology, 2017,V32(1): 11-25
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http://jcst.ict.ac.cn:8080/jcst/CN/10.1007/s11390-017-1703-5
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