›› 2011, Vol. 26 ›› Issue (1): 139-152.doi: 10.1007/s11390-011-1117-8

• Algorithm and Complexity • Previous Articles     Next Articles

NuMDG: A New Tool for Multiway Decision Graphs Construction

Sa'ed Abed1, Member, ACM, IEEE, Yassine Mokhtari2, Otmane Ait-Mohamed2, Member, ACM, IEEE, and Sofiène Tahar2, Senior Member, IEEE, Member, ACM   

  1. 1. Department of Computer Engineering, Hashemite University, Zarqa, Jordan;
    2. Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada
  • Received:2009-07-29 Revised:2010-11-13 Online:2011-01-01 Published:2011-01-01
  • About author:Sa'ed Abed received a B.Sc. degree in electrical engineering in 1994 and an M.Sc. degree in computer engineering in 1996, both from Jordan University of Science and Technology, Jordan. In 2008, he received his Ph.D. degree in computer engineering from Concordia University, Montreal, Canada. He has previously worked as lecturer in the Department of Computer Science at King Faisal University in Saudi Arabia from 1997 until 2003. In 2008, Dr. Abed joined the Department of Computer Engineering of Hashemite University, Zarqa, Jordan, as assistant professor. His research interests include formal methods, theorem proving, model checking, SAT-solvers, VLSI design, high level synthesis, computer architecture and fault tolerance. Dr. Abed also served as a reviewer for various international conferences and journals. He is member of IEEE, ACM and the Jordanian Engineers Association.
    Yassine Mokhtari received the B.Sc., M.Sc. and Ph.D. degrees in computer science from University Henri Poincare Nancy I, France, in 1994, 1995 and 2000, respectively. He then worked as a postdoctoral fellow in the Department of Electrical and Computer Engineering of Concordia University, Montreal, Canada between 2000 and 2001. He was appointed adjunct professor in the same department of Concordia University between 2001 and 2003. Currently, he is a senior verification engineer, AMD, Toronto, Canada. His main research interests include automatic verification of hardware and software, object-oriented concepts, and semantics and type systems. Before that he worked from 1996?1997 as expert engineer in telecommunication at CNRS, France, and in 2002?2003 as ASIC design verification engineer at Silicon Access Networks, Ottawa, Canada.
    Otmane Ait-Mohamed received M.Sc. and Ph.D. degrees in computer science from University Henri Poincare Nancy I, France, in 1992 and 1996, respectively. Currently, he is an associate professor in the Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada. Before that he worked with Cistel Technology, then Nortel Networks where he introduced the use of formal method techniques in the hardware design flow. His main research areas include software model checking, assertion based verification, automatic test generations, and FPGA-based design and verification. Dr. Ait Mohamed served as track chair of NEWCAS for several years. In 2008, he was the program chair for the TPHOLs conference held in Montreal. He is also reviewer for several related conferences and journals. Dr. Ait Mohamed is member of the Executive Committee of RESMIQ. He is a professional engineer in the Province of Quebec (OIQ). He is member of IEEE, ACM and the IEEE Computer Society.
    Sofiène Tahar received the Diploma degree in computer engineering from the University of Darmstadt, Germany, in 1990, and the Ph.D. degree with distinction in computer science from the University of Karlsruhe, Germany, in 1994. Currently, he is a professor and research chair in formal verification of systemon-chip at the Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada. His research interests are in the areas of formal hardware verification, system-on-chip verification, analog and mixed signal circuits verification, and probabilistic, statistical and reliability analysis of systems. Dr. Tahar, a professional engineer in the Province of Quebec, is the founder and director of the Hardware Verification Group at Concordia University. In 2007, he was named University Research Fellow upon receiving Concordia University's Senior Research Award. Dr. Tahar is senior member of IEEE, member of ACM, IEEE Computer Society and IEEE Communications Society.

Multiway Decision Graphs (MDGs) are a canonical representation of a subset of many-sorted first-order logic. This subset generalizes the logic of equality with abstract types and uninterpreted function symbols. The distinction between abstract and concrete sorts mirrors the hardware distinction between data path and control. Here we consider ways to improve MDGs construction. Efficiency is achieved through the use of the Generalized-If-Then-Else (GITE) commonly operator in Binary Decision Diagram packages. Consequently, we review the main algorithms used for MDGs verification techniques. In particular, Relational Product and Pruning by Subsumption are algorithms defined uniformly through this single GITE operator which will lead to a more efficient implementation. Moreover, we provide their correctness proof. This work can be viewed as a way to accommodate the ROBBD algorithms to the realm of abstract sorts and uninterpreted functions. The new tool, called NuMDG, accepts an extended SMV language, supporting abstract data sorts. Finally, we present experimental results demonstrating the efficiency of the NuMDG tool and evaluating its performance using a set of benchmarks from the SMV package.

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