Journal of Computer Science and Technology ›› 2019, Vol. 34 ›› Issue (5): 1136-1151.doi: 10.1007/s11390-019-1965-1

Special Issue: Computer Architecture and Systems

• Computer Architecture and Systems • Previous Articles     Next Articles

A Locating Method for Reliability-Critical Gates with a Parallel-Structured Genetic Algorithm

Jie Xiao1, Member, CCF, Zhan-Hui Shi1, Member, CCF, Jian-Hui Jiang2,*, Senior Member, CCF, Xu-Hua Yang1, Yu-Jiao Huang1, Hai-Gen Hu1, Member, CCF   

  1. 1 College of Computer Science and Technology, Zhejiang University of Technology, Hangzhou 310023, China;
    2 School of Software Engineering, Tongji University, Shanghai 201804, China
  • Received:2019-01-11 Revised:2019-06-03 Online:2019-08-31 Published:2019-08-31
  • Contact: Jian-Hui Jiang E-mail:jhjiang@tongji.edu.cn
  • About author:Jie Xiao received his Ph.D. degree in computer system architecture from Tongji University, Shanghai, in 2013. He is currently working with the College of Computer Science and Technology, Zhejiang University of Technology, Hangzhou. His current research interests include reliability evaluation and fault-tolerant design, deep learning and combinatorial optimization-computation. He also serves as a consultant and technical adviser for a research institute in electronic information fields. He is a member of CCF.
  • Supported by:
    The work was supported by the National Natural Science Foundation of China under Grant Nos. 61972354, 61502422, 61432017, 61772199, 61773348, and 61503338, the Natural Science Foundation of Zhejiang Province of China under Grant Nos. LY18F020028, LY18F030023, LY18F030084, and LY17F030016, and the Innovative Experiment Project of Zhejiang University of Technology of China under Grant No. PX-68182112.

The reliability allowance of circuits tends to decrease with the increase of circuit integration and the application of new technology and materials, and the hardening strategy oriented toward gates is an effective technology for improving the circuit reliability of the current situations. Therefore, a parallel-structured genetic algorithm (GA), PGA, is proposed in this paper to locate reliability-critical gates to successfully perform targeted hardening. Firstly, we design a binary coding method for reliability-critical gates and build an ordered initial population consisting of dominant individuals to improve the quality of the initial population. Secondly, we construct an embedded parallel operation loop for directional crossover and directional mutation to compensate for the deficiency of the poor local search of the GA. Thirdly, for combination with a diversity protection strategy for the population, we design an elitism retention based selection method to boost the convergence speed and avoid being trapped by a local optimum. Finally, we present an ordered identification method oriented toward reliability-critical gates using a scoring mechanism to retain the potential optimal solutions in each round to improve the robustness of the proposed locating method. The simulation results on benchmark circuits show that the proposed method PGA is an efficient locating method for reliability-critical gates in terms of accuracy and convergence speed.

Key words: gate-level circuit reliability; locating reliability-critical gate; parallel-structured genetic algorithm; directing strategy; scoring mechanism;

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