Journal of Computer Science and Technology ›› 2023, Vol. 38 ›› Issue (2): 289-297.doi: 10.1007/s11390-023-2544-z

Special Issue: Computer Architecture and Systems

• Special Section on Approximate Computing Circuits and Systems • Previous Articles     Next Articles

An Optimization Technique for PMF Estimation in Approximate Circuits

Yu-Qin Dou (窦昱钦) and Cheng-Hua Wang (王成华)   

  1. College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 211106, China
  • Received:2022-05-31 Revised:2023-01-14 Accepted:2023-03-12 Online:2023-05-10 Published:2023-05-10
  • Contact: Yu-Qin Dou
  • About author:Yuqin Dou received his B.S. degree in electrical engineering and automation from Xi'an University of Technological Information, Xi'an, in 2016, and his M.S. degree in information engineering from Xi'an Technological University, Xi'an, in 2019. He is currently pursuing his Ph.D. degree in electrical and information engineering at Nanjing University of Aeronautics and Astronautics, Nanjing. His research interests mainly include hardware security and electronic design automation.
  • Supported by:
    This work was (partially) supported by the National Natural Science Foundation of China under Grant No. 62022041 and the Fundamental Research Funds for the Central Universities of China under Grant No. NP2022103.

As an emerging computing technology, approximate computing enables computing systems to utilize hardware resources efficiently. Recently, approximate arithmetic units have received extensive attention and have been employed as hardware modules to build approximate circuit systems, such as approximate accelerators. In order to make the approximate circuit system meet the application requirements, it is imperative to quickly estimate the error quality caused by the approximate unit, especially in the high-level synthesis of the approximate circuit. However, there are few studies in the literature on how to efficiently evaluate the errors in the approximate circuit system. Hence, this paper focuses on error evaluation techniques for circuit systems consisting of approximate adders and approximate multipliers, which are the key hardware components in fault-tolerant applications. In this paper, the characteristics of probability mass function (PMF) based estimation are analyzed initially, and then an optimization technique for PMF-based estimation is proposed with consideration of these features. Finally, experiments prove that the optimization technology can reduce the time required for PMF-based estimation and improve the estimation quality.

Key words: approximate circuit; error quality estimate; probability mass function (PMF) estimation; architecture level;

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[1] Zhen Wang, Rong-Chen Xu, Jia-Cheng Chen, and Jie Xiao. A Survey of Reliability Issues Related to Approximate Circuits [J]. Journal of Computer Science and Technology, 2023, 38(2): 273-288.
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