Algorithm and Implementation of Parallel Multiplication in a Mixed Number System

This paper presents a high-speed multiplication algorithm for the mixed number system of the ordinary binary number and the symmetric redundant binary number.It is implemented with the multivalned logic theory,and 3-valued and 2-valued circuits are used.The 3-valued circuit proposed in this paper is an emitter-coupled logic circuit with high speed,simplicity and powerful functions.A 3-valued ECL threshold gate can simultaneously produce six types of one-variable operations.The array multiplier,designed with…