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CMOS Design of Ternary Arithmetic Devices

Wu Xunwei;F.Prosser;   

  1. Dept.of Electronic Engineering Hangzhou University; Hangzhou; Dept.of Computer Science; Indiana University; U.S.A.;
  • Online:1991-07-10 Published:1991-07-10

This paper presents CMOS circuit designs of a ternary adder and a ternary multiplier,formulated using transmission function theory.Binary carry signals appearing in these designs allow conventional look-ahead carry techniques to be used.Compared with previous similar designs,the circuits proposed in this paper have advantages such as low dissipation,low output impedance,and simplicity of construction.

Key words: object identification,module cohesion,inheritance,Ada;



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[3] S.L.Hurst, Multivalued logic-Its status and its future. IEEE Trans.on Corrputers, C-33:12(1984). 1160-1179.

[4] E.J.McCluskey, Logic design of MOS ternary logic .IEEE Proc. Int.Symp.on MYL,Evanston, 1980,1-5

[5] H.M.Razavi and S.E.Bou-Chazale, Design of a fast CMOS ternary adder.ibid, Boston, 1987, 20-23. ………….
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ISSN 1000-9000(Print)

         1860-4749(Online)
CN 11-2296/TP

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