MADET-A Machine-Description Table Based Instruction Scheduler in TH-RISC for Exploiting Instruction Level Parallelism

This paper presents a parameterized instruction scheduling algorithm based on machine description table for TH-RISC system, having a (3-5) stages pipeline structure.It would provide considerable fiexibility for instruction scheduling, improving execution efficiency for rapidly upgrading RISC machines. Alld, using this instruction scheduler as a tool, the effect of several methods for solving instruction interlock problem has been analyzed. Finally, a high performance approach combining the hardware feasibil…