Special Issue: Computer Architecture and Systems

• Articles • Previous Articles     Next Articles

Next high performance and low power flash memory package structure

Jung-Hoon Lee   

  1. ERI, Control Instrumentation Engineering, GyeongSang National University, Jinju, 660-701, Korea
  • Received:2006-10-25 Revised:2007-03-19 Online:2007-07-10 Published:2007-07-10

In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventional NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.

Key words: knapsack problem; approximation algorithm; FPTAS;



[1] Douglis F, Caceres R, Kaashoek F \it et al. \rm Storage alternatives for mobile computers. In -\it Proc. the 1st Symposium on Operating Systems Design and Implementation}, Monterey, CA, USA, Nov.1994, pp.25$\sim$37.

[2] Bez R, Camerlenghi E, Modelli A \it et al. \rm Introduction to flash memory. -\it Proc. the IEEE}, 2003, 91(4): 489$\sim$502.

[3] Arie Tal. Two technologies compared: NOR vs. NAND. -White Paper, 91-SR-012-04-8L}, Rev 1.1: M-Systems, 2003.

[4] NAND flash memory. Microsoft. http://download.microsoft. com/download/5/7/7/% 577a5684-8a83-43ae-9272-ff260a9c20e2/ NANDFlashMemo\-ry.doc.

[5] Samsung Datasheet. Samsung Co. http://www.datasheet4u. com/ html/K/9/K/K9K1G08U0M.

[6] Flash memory quick reference guide. Fujitsu Co. http:// www.spansion.com/products/Final\%20Fujitsu\%20English\_V2. pdf.

[7] Jouppi N P. Improving direct-mapped cache performance by the addition of a small fully associative cache and prefetch buffers. In -\it Proc. the 17th ISCA}, Seattle, WA, USA, May 1990, pp.364$\sim$373.

[8] Przybylski S. The performance impact of block sizes and fetch strategies. In -\it Proc. the 17th ISCA}, Seattle, WA, USA, May 1990, pp.160$\sim$169.

[9] F Jesus Sanchez, Antonio Gonzalez, Mateo Valeo. Static locality analysis for cache management. In -\it Proc. the PACT'97}, San Francisco, CA, USA, Nov. 1997, pp.261$\sim$271.

[10] Lee C, Potkonjak M, Mangione-Smith M W. MediaBench: A tool for evaluating and synthesizing multimedia and communication systems. In -\it Proc. MICRO-30}, North Carolina, USA, Dec. 1997, pp.330$\sim$335.

[11] Ball T, Larus J R. Optimally profiling and tracing programs. -\it ACM Transactions on Programming Languages and Systems}, 1994, 16(4): 1319$\sim$1360.

[12] Edler J, Hill M D. Dinero IV trace-driven uniprocessor cache simulator. Available from Univ. Wisconsin, ftp://ftp.nj.nec. com/pub/edler/d4/1997.
[1] Pengjun Wan, Zhi-Guo Wan. Maximizing Networking Capacity in Multi-Channel Multi-Radio Wireless Networks [J]. , 2014, 29(5): 901-909.
[2] Yi Wu (吴奕). Pricing Loss Leaders Can be Hard [J]. , 2012, 27(4): 718-726.
[3] Xiao-Wen Lou(娄晓文) and Da-Ming Zhu(朱大铭), Senior Member, CCF. Sorting Unsigned Permutations by Weighted Reversals, Transpositions, and Transreversals [J]. , 2010, 25(4): 853-863.
[4] Wei-Lin Li, Peng Zhang, and Da-Ming Zhu. On Constrained Facility Location Problems [J]. , 2008, 23(5 ): 740-748 .
[5] Florian Diedrich, Rolf Harren, Klaus Jansen, Ralf Thöle, and Henning Thomas. Approximation Algorithms for 3D Orthogonal Knapsack [J]. , 2008, 23(5 ): 749-762 .
[6] Jian-Xin Wang, Xiao-Shuang Xu, and Jian-Er Chen. Approximation Algorithm Based on Chain Implication for Constrained Minimum Vertex Covers in Bipartite Graphs [J]. , 2008, 23(5 ): 763-768 .
[7] Ya-Feng Wu, Yin-Long Xu , and Guo-Liang Chen. Approximation Algorithms for Steiner Connected Dominating Set [J]. , 2005, 20(5): 713-716 .
[8] Jian-Er Chen. Parameterized Computation and Complexity: A New Approach Dealing with NP-Hardnes [J]. , 2005, 20(1): 0-0.
[9] Ken-Li Li, Ren-Fa Li, and Qing-Hua. Optimal Parallel Algorithm for the Knapsack Problem Without Memory Conflicts [J]. , 2004, 19(6): 0-0.
[10] Yong Zhang and Hong Zhu. Approximation Algorithm for Weighted Weak Vertex Cover [J]. , 2004, 19(6): 0-0.
[11] Zi-Mao Li, Da-Ming Zhu, and Shao-Han Ma. Approximation Algorithm for Bottleneck Steiner Tree Problem in the Euclidean Plane [J]. , 2004, 19(6): 0-0.
[12] HE Yong (何勇) and CHEN Ting (陈汀). A New Approximation Algorithm for Sorting of Signed Permutations [J]. , 2003, 18(1): 0-0.
[13] GU Xiaodong(顾晓东),CHEN Guoliang(陈国良)and XU Yinlong(许胤龙). Deep Performance Analysis of Refined Harmonic Bin Packing Algorithm [J]. , 2002, 17(2): 0-0.
[14] ZHANG Li'ang; ZHANG Yin;. Approximation for- Knapsack Problemswith Multiple Constraints [J]. , 1999, 14(4): 289-297.
[15] Cheng Qi; Zhu Hong;. MNP: A Class of NP Optimization Problems [J]. , 1997, 12(4): 306-313.
Viewed
Full text


Abstract

Cited

  Shared   
  Discussed   
[1] Zhang Bo; Zhang Tian; Zhang Jianwei; Zhang Ling;. Motion Planning for Robots with Topological Dimension Reduction Method[J]. , 1990, 5(1): 1 -16 .
[2] Yu Shengke;. Reasoning in H-Net: A Unified Approach to Intelligent Hypermedia Systems[J]. , 1996, 11(1): 83 -89 .
[3] Fu Yuxi;. Reaction Graph[J]. , 1998, 13(6): 510 -530 .
[4] Wen-Jun Shi, Qin-Xiang Cao, Yu-Xin Deng, Han-Ru Jiang, Yuan Feng. Symbolic Reasoning About Quantum Circuits in Coq[J]. Journal of Computer Science and Technology, 2021, 36(6): 1291 -1306 .
[5] Yi-Mo Du, Nong Xiao, Fang Liu, and Zhi-Guang Chen . CSWL: Cross-SSD Wear-Leveling Method in SSD-Based RAID Systems for System Endurance and Performance[J]. , 2013, 28(1): 28 -41 .
[6] Xiang-Ke Liao, Zheng-Bin Pang, Ke-Fei Wang, Yu-Tong Lu, Min Xie, Jun Xia, De-Zun Dong, Guang Suo. High Performance Interconnect Network for Tianhe System[J]. , 2015, 30(2): 259 -272 .
[7] Kai Zhang, Feng Chen, Xiaoning Ding, Yin Huai, Rubao Lee, Tian Luo, Kaibo Wang, Yuan Yuan, Xiaodong Zhang. Hetero-DB: Next Generation High-Performance Database Systems by Best Utilizing Heterogeneous Computing and Storage Resources[J]. , 2015, 30(4): 657 -678 .
[8] Zuo-Ning Chen, Kang Chen, Jin-Lei Jiang, Lu-Fei Zhang, Song Wu, Zheng-Wei Qi, Chun-Ming Hu, Yong-Wei Wu, Yu-Zhong Sun, Hong Tang, Ao-Bing Sun, Zi-Lu Kang. Evolution of Cloud Operating System: From Technology to Ecosystem[J]. , 2017, 32(2): 224 -241 .
[9] Xu-Ran Zhao, Xun Wang, Qi-Chao Chen. Temporally Consistent Depth Map Prediction Using Deep CNN and Spatial-temporal Conditional Random Field[J]. , 2017, 32(3): 443 -456 .
[10] Shi-Yu Jia, Zhen-Kuan Pan, Guo-Dong Wang, Wei-Zhong Zhang, CCF Xiao-Kang Yu. Stable Real-Time Surgical Cutting Simulation of Deformable Objects Embedded with Arbitrary Triangular Meshes[J]. , 2017, 32(6): 1198 -1213 .

ISSN 1000-9000(Print)

         1860-4749(Online)
CN 11-2296/TP

Home
Editorial Board
Author Guidelines
Subscription
Journal of Computer Science and Technology
Institute of Computing Technology, Chinese Academy of Sciences
P.O. Box 2704, Beijing 100190 P.R. China
Tel.:86-10-62610746
E-mail: jcst@ict.ac.cn
 
  Copyright ©2015 JCST, All Rights Reserved