›› 2010, Vol. 25 ›› Issue (2): 181-191.

Special Issue: Computer Architecture and Systems

• Special Section on CPU Researches in China • Previous Articles     Next Articles

System Architecture of Godson-3 Multi-Core Processors

Xiang Gao1 (高  |翔), Yun-Ji Chen1 (陈云霁), Huan-Dong Wang1,2(王焕东), Dan Tang1,2 (唐   丹), and Wei-Wu Hu1 (胡伟武)   

  1. 1Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
    2Graduate University of Chinese Academy of Sciences, Beijing 100049, China
  • Received:2009-03-30 Revised:2009-10-09 Online:2010-03-05 Published:2010-03-05
  • About author:
    Xiang Gao received his B.S. degree in 2002 and his Ph.D. degree in 2007, both in computer science from the University of Science and Technology of China. He is currently an assistant professor in the Institute of Computing Technology, Chinese Academy of Sciences. His research interests include high performance computer architecture, parallel processing and operating system.
    Yun-Ji Chen received his B.S. degree from the University of Science and Technology of China in 2002 and his Ph.D. degree from the Institute of Computing Technology, Chinese Academy of Sciences in 2007, both in computer science. He is currently an assistant professor in the Institute of Computing Technology. His research interests include hardware verification and high performance computer architecture.
    Huan-Dong Wang received his B.S. degree from the University of Science and Technology of China in 2004, majored in computer science. He is currently a Ph.D. candidate of the Institute of Computing Technology, Chinese Academy of Sciences. His research interests include high performance computer architecture, memory and IO system.
    Dan Tang is a Ph.D. candidate in computer science at the Institute of Computing Technology, Chinese Academy of Sciences. His research interests include computer architecture, parallel computing and operating system. He received an M.S. degree in computer science from Huazhong University of Science and Technology.
    Wei-Wu Hu received his B.S. degree from the University of Science and Technology of China in 1991, and his Ph.D. degree from the Institute of Computing Technology, Chinese Academy of Sciences in 1996, both in computer science. He is currently a professor in the Institute of Computing Technology. His research interests include high performance computer architecture, parallel processing and VLSI design.
  • Supported by:

    Supported by the National High Technology Development 863 Program of China under Grant No. 2008AA010901, the National Natural Science Foundation of China under Grant Nos. 60736012 and 60673146, and the National Basic Research 973 Program of China under Grant No.2005CB321601.

Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem.


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