›› 2010, Vol. 25 ›› Issue (2): 192-199.

Special Issue: Computer Architecture and Systems

• Special Section on CPU Researches in China • Previous Articles     Next Articles

Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor

Bao-Xia Fan1,2,3 (范宝峡), Liang Yang1,2,3 (杨 梁), Jiang-Mei Wang1,3 (王江嵋), Ru Wang1,2,3 (王 茹), Bin Xiao1,2 (肖 斌), Ying Xu1,2 (徐 英), Dong Liu1,2,3 (刘 动), and Ji-Ye Zhao1,3 (赵继业)   

  1. 1Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
    2Graduate University of Chinese Academy of Sciences, Beijing 100039, China
    3Loongson Technology, Corporation Limited, Beijing 100190, China
  • Received:2009-03-30 Revised:2009-11-05 Online:2010-03-05 Published:2010-03-05
  • About author:
    Bao-Xia Fan received the B.S. and M.S. degrees in power engineering from Dalian University of Technology in 1998 and 2001, respectively. He is currently a Ph.D. candidate in the Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China. His research interests include on-chip variation analysis and optimization, design methodology for high performance processor.
    Liang Yang received the B.S. degree in computer science and technology from University of Science and Technology of China, Hefei, in 2004. He is currently pursuing the Ph.D. degree in the Institute of Computing Technology, Chinese Academy of Sciences, Beijing. His current research interests include clock distribution network, interconnect modeling and high performance and low power design.
    Jiang-Mei Wang received the B.S. Eng. degree in radio project from Harbin Institute of Technology, Harbin, in 1995. She is currently working as a P&R engineer of Loongson CPU series chip in the Institute of Computing Technology, Chinese Academy of Sciences, Beijing. Her research interests include deep submicron physical design.
    Ru Wang received her B.S. degree from the University of Science and Technology of China in 2005, majored in electronic science and technology. She is currently a Ph.D. candidate of the Institute of Computing Technology, the Chinese Academy of Sciences, Beijing, China. Her research interests include chip power analysis and low power techniques for high performance processors.
    Bin Xiao received the B.S. degree in electronic and electric from Peking University, Beijing, in 2006. He is currently working for Ph.D. degree in computing architecture at Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China. His research interests include deep submicron physical design.
    Ying Xu is currently a Master candidate in computing architecture at Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China. Her research interests include deep submicron physical design.
    Dong Liu received his M.S. degree in microelectronics and solid electronics from the Sun Yat-Sen University, China, in 2006. Since 2006, he has worked at Microprocessor Technology Research Center of Institute of Computing Technology. His current research interests include physical design for high performance processor, and design methodology of SOC design.
    Ji-Ye Zhao received his M.S. degree in power engineering from the Dalian University of Technology, China, in 2001. Since 2001, he has been with the Godson CPU Design Group for developing the high performance general microprocessor. His current research interests include physical design for high performance processor, and design methodology of SOC design.
  • Supported by:

    This work is supported by the National Basic Research 973 Program of China under Grant No. 2005CB321600, the National High Technology Research & Development 863 Program of China under Grant Nos. 2008AA110901, 2009AA01Z125 and 2007AA01Z114, and the National Natural Science Foundation of China under Grant Nos. 60803029, 60673146, 60736012.

The Godson-3A microprocessor is a quad-core version of the scalable Godson-3 multi-core series. It is physically implemented based on the 65nm CMOS process. This 174mm2 chip consists of 425 million transistors. The maximum frequency is 1GHz with a maximum power consumption of 15W. The main challenges of Godson-3A physical implementation include very large scale, high frequency requirement, sub-micron technology effects and aggressive time schedule. This paper describes the design methodology of the physical implementation of Godson-3A, with particular emphasis on design methods for high frequency, clock tree design, power management, and on-chip variation (OCV) issue.


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