›› 2011, Vol. 26 ›› Issue (3): 363-372.doi: 10.1007/s11390-011-1139-2

Special Issue: Surveys; Computer Architecture and Systems

• Special Section on Advanced Computing Technology in China • Previous Articles     Next Articles

The Godson Processors: Its Research, Development, and Contributions

Wei-Wu Hu1,2 (胡伟武), Senior Member, CCF, Yan-Ping Gao1,2,3 (高燕萍), Member, CCF, Tian-Shi Chen1,2 (陈天石), and Jun-Hua Xiao1,2 (肖俊华), Member, CCF   

  1. 1. Key Laboratory of Computer System and Architecture, Chinese Academy of Sciences, Beijing 100190, China;
    2. Loongson Technologies Corporation Limited, Beijing 100190, China;
    3. Graduate University of Chinese Academy of Sciences, Beijing 100190, China
  • Received:2010-12-20 Revised:2011-03-09 Online:2011-05-05 Published:2011-05-05
  • Supported by:

    Supported by the National Natural Science Foundation of China under Grant Nos. 60736012 and 60673146, the National High Technology Research and Development 863 Program of China under Grant Nos. 2008AA110901 and 2007AA01Z114, and the National Basic Research 973 Program of China under Grant No. 2005CB321600.

The Godson project with an R&D history of 10 years is an independent national program of China that aims at developing advanced microprocessor technologies based on fundamental research and commercialization of the chip technology. We will give a comprehensive presentation of the Godson project, including its history, technical roadmaps, and several unique technical merits.

[1] Hu W W, Hou R, Xiao J H, Zhang L B. High performance general-purpose microprocessors: Past and future. Journal of Computer Science and Technology, 2006, 21(5): 631-640.

[2] Hu W W, Zhang F X, Li Z S. Microarchitecture of the Godson-2 processor. Journal of Computer Science and Technology, 2005, 20(2): 243-249.

[3] Hu W, Wang J, Gao X, Chen Y, Liu Q, Li G. Godson-3: A scalable multicore RISC processor with x86 emulation. IEEE Micro, 2009, 29(2): 17-29.

[4] Hu W, Wang R, Chen Y, Fan B, S. Zhong, Gao X, Qi Z, Yang X. Godson-3B: A 1GHz 40W 8-Core 128GFlops Processor in 65nm CMOS. In Proc. the 58th IEEE International Solid-State Circuits Conference (ISSCC 2011), San Francisco, USA, Feb. 20-24, 2011, pp.75-76.

[5] Gao X, Chen Y J, Wang H D, Tang D, Hu W W. System architecture of Godson-3 multi-core processors. Journal of Computer Science and Technology, 2010, 25(2): 181-191.

[6] HuW, Chen Y. GS464V: A high-performance low-power XPU with 512-bit vector extension. In Proc. 22nd IEEE Symposium on High Performance Chips (HOT CHIPS 2010), Stanford University, USA, Aug. 22-24, 2010.

[7] Cheng X, Wang X, Lu J, Yi J, Tong D, Guan X, Liu F, Liu X, Yang C, Feng Y. Research progress of UniCore CPUs and PKUnity SoCs. Journal of Computer Science and Technology, 2010, 25(2): 200-213.

[8] Chen S, Wan J, Lu J, Liu Z, Sun H, Sun Y, Liu H, Liu X, Li Z, Xu Y, Chen X. YHFT-QDSP: High-performance heterogeneous multi-core DSP. Journal of Computer Science and Technology, 2010, 25(2): 214-224.

[9] Huang Y, Zhu Y, Ju P, Wu Z, Chen C. Functional verification of “ShenWei-1” high performance microprocessor. Journal of Software, 2009, 20(4): 1077-1086. (In Chinese)

[10] Chen Y, Lv Y, Hu W, Chen T, Shen H, Wang P, Pan H. Fast complete memory consistency verification. In Proc. the 15th International Symposium on High-Performance Computer Architecture (HPCA2009), Raleigh, USA, Feb. 14-18, pp.381-392.

[11] Chen Y, Hu W, Chen T, Wu R. LReplay: A pending period based deterministic replay scheme. In Proc. the 37th ACM IEEE International Symposium on Computer Architecture (ISCA2010), Saint-Maro, France, Jun. 19-23, 2010, pp.187-197.

[12] http://www.top500.org, 2011.
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