›› 2015, Vol. 30 ›› Issue (5): 1154-1160.doi: 10.1007/s11390-015-1551-0

Special Issue: Theory and Algorithms

• Regular Paper • Previous Articles    

Constructing Edge-Colored Graph for Heterogeneous Networks

Rui Hou1(侯睿), Student Member, IEEE, Ji-Gang Wu1,2*(武继刚), Member, CCF, IEEEYawen Chen3(陈亚文), Haibo Zhang3(张海波), Xiu-Feng Sui2(隋秀峰), Member, CCF, IEEE   

  1. 1 School of Computer Science and Software Engineering, Tianjin Polytechnic University, Tianjin 300387, China;
    2 State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences Beijing 100190, China;
    3 Department of Computer Science, University of Otago, Dunedin 9054, New Zealand
  • Received:2014-05-24 Revised:2014-11-08 Online:2015-09-05 Published:2015-09-05
  • Contact: Ji-Gang Wu E-mail:asjgwu@gmail.com
  • About author:Rui Hou received his Bachelor's degree in software engineering from Tianjin Polytechnic University (TJPU), Tianjin, in 2012. He is working toward his Master's degree in computer science and technology at the School of Computer Science and Software Engineering in TJPU. His research interests include graph theory, parallel/distributed computing, cluster/grid/cloud computing, optical wireless communication, and high-performance computer architectures.
  • Supported by:

    This work was supported by the National Natural Science Foundation of China under Grant Nos. 61173032 and 61202062, the National Natural Science Foundation of China (Tianyuan Special Foundation) under Grant Nos. 11326211 and 11326198, the Specialized Research Fund for the Doctoral Program of Higher Education of China under Grant No. 20131201110002, and the Key Laboratory of Computer Architecture Opening Topic Fund Subsidization under Grant No. CARCH201303.

In order to build a fault-tolerant network, heterogeneous facilities are arranged in the network to prevent homogeneous faults from causing serious damage. This paper uses edge-colored graph to investigate the features of a network topology which is survivable after a set of homogeneous devices malfunction. We propose an approach to designing such networks under arbitrary parameters. We also show that the proposed approach can be used to optimize inter-router connections in network-on-chip to reduce the additional consumption of energy and time delay.

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