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Volume 38 Issue 4
July  2023
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Li RS, Peng P, Shao ZY et al. Evaluating RISC-V vector instruction set architecture extension with computer vision workloads. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 38(4): 807−820 July 2023. DOI: 10.1007/s11390-023-1266-6.
Citation: Li RS, Peng P, Shao ZY et al. Evaluating RISC-V vector instruction set architecture extension with computer vision workloads. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 38(4): 807−820 July 2023. DOI: 10.1007/s11390-023-1266-6.
shu

Evaluating RISC-V Vector Instruction Set Architecture Extension with Computer Vision Workloads

  • 1.

    National Engineering Research Center for Big Data Technology and System, Huazhong University of Science and Technology Wuhan 430074, China

  • 2.

    Services Computing Technology and System Laboratory, Huazhong University of Science and Technology, Wuhan 430074 China

  • 3.

    Cluster and Grid Computing Lab, Huazhong University of Science and Technology, Wuhan 430074, China

Funds: This work is supported by the National Natural Science Foundation of China under Grant No. 61972444.
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  • Author Bio:

    Ruo-Shi Li received his B.E. degree in computer science and technology in Huazhong University of Science and Technology (HUST), Wuhan, in 2019. He is currently working towards his Ph.D. degree in HUST, Wuhan. His current research interests are RISC-V, FPGA, and hardware accelerator

    Ping Peng received his B.E. degree in software engineer in Beihang University (BUAA), Beijing, in 2015. He received his M.S. degree in computer science and technology in Huazhong University of Science and Technology (HUST), Wuhan, in 2019. His current research interest is computer systems architecture

    Zhi-Yuan Shao received his Ph.D. degree in computer science and technology from Huazhong University of Science and Technology (HUST), Wuhan, in 2005. He is now a professor of computer science and engineering at HUST, Wuhan. His research interests are in the areas of graph computing, computing system, and big-data processing

    Hai Jin is a chair professor of computer science and engineering at Huazhong University of Science and Technology (HUST) in Wuhan. Jin received his Ph.D. degree in computer engineering from HUST, Wuhan, in 1994. In 1996, he was awarded a German Academic Exchange Service fellowship to visit the Technical University of Chemnitz, Straße der Nationen. Jin worked at the University of Hong Kong between 1998 and 2000, and as a visiting scholar at the University of Southern California, Los Angeles, between 1999 and 2000. He was awarded Excellent Youth Award from the National Science Foundation of China in 2001. Jin is a fellow of CCF and IEEE, and a life member of ACM. He has co-authored more than 20 books and published over 900 research papers. His research interests include computer architecture, parallel and distributed computing, big data processing, data storage, and system security

    Ran Zheng received her M.S. and Ph.D. degrees in computer science and technology from Huazhong University of Science and Technology (HUST), Wuhan, in 2002 and 2006, respectively. She is currently an associate professor of computer science and engineering at HUST in Wuhan. Her research interests include distributed computing, cloud computing, high-performance computing, and applications

  • Corresponding author:

    zyshao@hust.edu.cn

  • Received Date: January 04, 2021
  • Accepted Date: May 24, 2023
    Abstract

  • Computer vision (CV) algorithms have been extensively used for a myriad of applications nowadays. As the multimedia data are generally well-formatted and regular, it is beneficial to leverage the massive parallel processing power of the underlying platform to improve the performances of CV algorithms. Single Instruction Multiple Data (SIMD) instructions, capable of conducting the same operation on multiple data items in a single instruction, are extensively employed to improve the efficiency of CV algorithms. In this paper, we evaluate the power and effectiveness of RISC-V vector extension (RV-V) on typical CV algorithms, such as Gray Scale, Mean Filter, and Edge Detection. By our examinations, we show that compared with the baseline OpenCV implementation using scalar instructions, the equivalent implementations using the RV-V (version 0.8) can reduce the instruction count of the same CV algorithm up to 24x, when processing the same input images. Whereas, the actual performances improvement measured by the cycle counts is highly related with the specific implementation of the underlying RV-V co-processor. In our evaluation, by using the vector co-processor (with eight execution lanes) of Xuantie C906, vector-version CV algorithms averagely exhibit up to 2.98x performances speedups compared with their scalar counterparts.

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