We use cookies to improve your experience with our site.

Indexed in:

SCIE, EI, Scopus, INSPEC, DBLP, CSCD, etc.

Submission System
(Author / Reviewer / Editor)
Advanced Search
Volume 28 Issue 1
January  2013
Turn off MathJax
Article Contents
Abstract
References
Related Articles
Carlos Teijeiro, Guillermo L. Taboada, Juan Touriño, Ramón Doallo, José C. Mouriño, Damián A. Mallón, Brian Wibecan. Design and Implementation of an Extended Collectives Library for Unified Parallel C[J]. Journal of Computer Science and Technology, 2013, 28(1): 72-89. DOI: 10.1007/s11390-013-1313-9
Citation: Carlos Teijeiro, Guillermo L. Taboada, Juan Touriño, Ramón Doallo, José C. Mouriño, Damián A. Mallón, Brian Wibecan. Design and Implementation of an Extended Collectives Library for Unified Parallel C[J]. Journal of Computer Science and Technology, 2013, 28(1): 72-89. DOI: 10.1007/s11390-013-1313-9
shu

Design and Implementation of an Extended Collectives Library for Unified Parallel C

  • 1. Computer Architecture Group, University of A Coruña, A Coruña 15071, Spain;
    2. Galicia Supercomputing Center, Santiago de Compostela 15705, Spain;
    3. Jülich Supercomputing Centre, Institute for Advanced Simulation, Forschungszentrum Jülich, Jülich D-52425, Germany;
    4. Industry Standard Servers Group, Hewlett-Packard Company, Montgomery, Alabama 36117, U.S.A.

Funds: This work was funded by Hewlett-Packard (Project "Improving UPC Usability and Performance in Constellation Systems: Imple- mentation/Extensions of UPC Libraries"), and partially supported by the Ministry of Science and Innovation of Spain under Project No. TIN2010-16735 and the Galician Government (Consolidation of Competitive Research Groups, Xunta de Galicia ref. 2010/6).
More Information
  • Received Date: February 07, 2012
  • Revised Date: September 20, 2012
  • Published Date: January 04, 2013
    Abstract
  • Unified Parallel C (UPC) is a parallel extension of ANSI C based on the Partitioned Global Address Space (PGAS) programming model, which provides a shared memory view that simplifies code development while it can take advantage of the scalability of distributed memory architectures. Therefore, UPC allows programmers to write parallel applications on hybrid shared/distributed memory architectures, such as multi-core clusters, in a more productive way, accessing remote memory by means of different high-level language constructs, such as assignments to shared variables or collective primitives. However, the standard UPC collectives library includes a reduced set of eight basic primitives with quite limited functionality. This work presents the design and implementation of extended UPC collective functions that overcome the limitations of the standard collectives library, allowing, for example, the use of a specific source and destination thread or defining the amount of data transferred by each particular thread. This library fulfills the demands made by the UPC developers community and implements portable algorithms, independent of the specific UPC compiler/runtime being used. The use of a representative set of these extended collectives has been evaluated using two applications and four kernels as case studies. The results obtained confirm the suitability of the new library to provide easier programming without trading off performance, thus achieving high productivity in parallel programming to harness the performance of hybrid shared/distributed memory architectures in high performance computing.
    • FullText(HTML)
    • References (13)
  • [1]
    El-Ghazawi T, Chauvin S. UPC benchmarking issues. InProc. the 30th Int. Conference on Parallel Processing, Sept.2001, pp.365-372.
    [2]
    Taboada G L, Teijeiro C, Touriño J et al. Performance evalu-ation of unified parallel C collective communications. In Proc.the 11th IEEE Int. Conf. High Performance Computing andCommunications, Jun. 2009, pp.69-78.
    [3]
    Salama R A, Sameh A. Potential performance improvementof collective operations in UPC. Advances in Parallel Com-puting, 2008, 15: 413-422.
    [4]
    Cantonnet F, Yao Y, Zahran M M et al. Productivity analy-sis of the UPC language. In Proc. the 18th Int. Parallel andDistributed Processing Symposium, Apr. 2004, pp.254.
    [5]
    Nishtala R, Alm醩i G, Cascaval C. Performance without pain= productivity: Data layout and collective communication inUPC. In Proc. the 13thACM SIGPLAN Symp. Principlesand Practice of Parallel Programming, Feb. 2008, pp.99-110.
    [6]
    Nishtala R, Zheng Y, Hargrove P, Yelick K. Tuning collec-tive communication for Partitioned Global Address Space pro-gramming models. Parallel Computing, 2011, 37(9): 576-591.
    [7]
    Bruck J, Ho C T, Kipnis S, Upfal E, Weathersby D. Effi-cient algorithms for all-to-all communications in multiportmessage-passing systems. IEEE Transactions on Parallel andDistributed Systems, 1997, 8(11): 1143-1156.
    [8]
    Dinan J, Balaji P, Lusk E L et al. Hybrid parallel program-ming with MPI and unified parallel C. In Proc. the 7th Int.Conf. Computing Frontiers, May 2010, pp.177-186.
    [9]
    El-Ghazawi T, Cantonnet F, Yao Y, Annareddy S, MohamedA S. Benchmarking parallel compilers: A UPC case study. Future Generation Computer Systems, 2006, 22(7): 764-775.
    [10]
    Mall髇 D A, Taboada G L, Teijeiro C, Touriño J, Fraguela BB, G髆ez A, Doallo R, Mouriño J C. Performance evaluationof MPI, UPC and OpenMP on multicore architectures. InProc. the 16th European PVM/MPI Users' Group Meeting,Sept. 2009, pp.174-184.
    [11]
    Zhang Z, Seidel S. Benchmark measurements of current UPCplatforms. In Proc. the 19th Int. Parallel and DistributedProcessing Symposium, Apr. 2005.
    [12]
    Dean J, Ghemawat S. MapReduce: A flexible data processingtool. Communications of the ACM, 2010, 53(1): 72-77.
    [13]
    Teijeiro C, Taboada G L, Touriño J, Doallo R. Design andimplementation of MapReduce using the PGAS programmingmodel with UPC. In Proc. the 17th International Conferenceon Parallel and Distributed Systems, Dec. 2011, pp.196-203.
    • Relative Articles

  • Related Articles

    [1]Zi-Xuan Ma, Yu-Yang Jin, Shi-Zhi Tang, Hao-Jie Wang, Wei-Cheng Xue, Ji-Dong Zhai, Wei-Min Zheng. Unified Programming Models for Heterogeneous High-Performance Computers[J]. Journal of Computer Science and Technology, 2023, 38(1): 211-218. DOI: 10.1007/s11390-023-2888-4
    [2]Rong Ge, Xizhou Feng, Pengfei Zou, Tyler Allen. The Paradigm of Power Bounded High-Performance Computing[J]. Journal of Computer Science and Technology, 2023, 38(1): 87-102. DOI: 10.1007/s11390-023-2885-7
    [3]Michèle Weiland, Bernhard Homölle. Usage Scenarios for Byte-Addressable Persistent Memory in High-Performance and Data Intensive Computing[J]. Journal of Computer Science and Technology, 2021, 36(1): 110-122. DOI: 10.1007/s11390-020-0776-8
    [4]Qi Chen, Kang Chen, Zuo-Ning Chen, Wei Xue, Xu Ji, Bin Yang. Lessons Learned from Optimizing the Sunway Storage System for Higher Application I/O Performance[J]. Journal of Computer Science and Technology, 2020, 35(1): 47-60. DOI: 10.1007/s11390-020-9798-5
    [5]André Brinkmann, Kathryn Mohror, Weikuan Yu, Philip Carns, Toni Cortes, Scott A. Klasky, Alberto Miranda, Franz-Josef Pfreundt, Robert B. Ross, Marc-André Vef. Ad Hoc File Systems for High-Performance Computing[J]. Journal of Computer Science and Technology, 2020, 35(1): 4-26. DOI: 10.1007/s11390-020-9801-1
    [6]Zhi-Wei Xu. Cloud-Sea Computing Systems：Towards Thousand-Fold Improvement in Performance per Watt for the Coming Zettabyte Era[J]. Journal of Computer Science and Technology, 2014, 29(2): 177-181. DOI: 10.1007/s11390-014-1420-2
    [7]Yong-Qin Huang, Hong-Liang Li, Xiang-Hui Xie, Lei Qian, Zi-Yu Hao, Feng Guo, Kun Zhang. ArchSim: A System-Level Parallel Simulation Platform for the Architecture Design of High Performance Computer[J]. Journal of Computer Science and Technology, 2009, 24(5): 901-912.
    [8]Xue-Jun Yang, Yong Dou, Qing-Feng Hu. Progress and Challenges in High Performance Computer Technology[J]. Journal of Computer Science and Technology, 2006, 21(5): 674-681.
    [9]HUANG Linpeng, SUN Yongqiang, YUAN Wei. Hierarchical Bulk Synchronous Parallel Model and Performance Optimization[J]. Journal of Computer Science and Technology, 1999, 14(3): 224-233.
    [10]Ding Wei, Gong Jian, Yu Xiao. A Traffic Partition Algorithm for Switched LANs and Its Performance Analysis[J]. Journal of Computer Science and Technology, 1998, 13(3): 261-267.
    • Supplements (0)

Catalog

    Get Citation
    PDF
    XML
    Article views (16) PDF downloads (1514) Cited by()
    Related

    Copyright ©2025 JCST, All Rights Reserved     京ICP备05002829号-1

    Institute of Computing Technology, Chinese Academy of Sciences
    P.O. Box 2704, Beijing 100190, P.R. China

    Tel.: 86-10-62610746 E-mail: jcst@ict.ac.cn

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return