Inversion Optimization Strategy Based on Primitives with Complement Attributes

Inverters or logic primitives that have complement attributes are essential to building a logical complement system. NAND and NOR operations which have complement attributes are of high interest for complementary metal-oxidesemiconductor (CMOS) technology, as they can be easily implemented in transistors. Different from the logic models used in standard CMOS, several nano-emerging technologies, such as quantum-dot cellular automata (QCA) and spin torque majority gates, are in favor of realizing a majority voter function but imposing difficulties in implementing inversions. Previous studies pay lots of effort in optimizing the number of inverters in logic representations, whereas the mapping using primitives with complement attributes is not a major concern. In this paper, we establish a technology mapping method from logic representations to nanotechnology primitives by considering NAND-NOR-Inverter (NNI) and exclusive-NOR (XNOR) operations. We adopt XOR-Majority Graph (XMG) as a logic representation. The proposed mapping method is evaluated using the QCA technology. Experimental results over EPFL benchmark suites show we achieve 11.77% and 30.13% reductions in the area and the number of inverters, respectively.