A Power-Aware Branch Predictor by Accessing the BTB Selectively

Microarchitects should consider power consumption, together withaccuracy, when designing a branch predictor, especially in embeddedprocessors. This paper proposes a power-aware branch predictor, which isbased on the gshare predictor, by accessing the BTB (Branch TargetBuffer) selectively. To enable the selective access to the BTB, the PHT(Pattern History Table) in the proposed branch predictor is accessed onecycle earlier than the traditional PHT if the program is executedsequentially without branch instructions. As a side effect, twopredictions from the PHT are obtained through one access to the PHT,resulting in more power savings. In the proposed branch predictor, ifthe previous instruction was not a branch and the prediction from thePHT is untaken, the BTB is not accessed to reduce power consumption. Ifthe previous instruction was a branch, the BTB is always accessed,regardless of the prediction from the PHT, to prevent the additionaldelay/accuracy decrease. The proposed branch predictor reduces the powerconsumption with little hardware overhead, not incurring additionaldelay and never harming prediction accuracy. The simulation results showthat the proposed branch predictor reduces the power consumption by 29--47%.