Improved FFSBM Algorithm and Its VLSI Architecture for AVS Video Standard
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Abstract
The Video part of AVS (Audio Video Coding Standard) hasbeen finalized recently. It has adopted variable block size motioncompensation to improve its coding efficiency. This has brought heavycomputation burden when it is applied to compress the HDTV (highdefinition television) content. Based on the original FFSBM (fast fullsearch blocking matching), this paper proposes an improved FFSBMalgorithm to adaptively reduce the complexity of motion estimationaccording to the actual motion intensity. The main idea of the proposedalgorithm is to use the statistical distribution of MVD (motion vectordifference). A VLSI (very large scale integration) architecture is alsoproposed to implement the improved motion estimation algorithm.Experimental results show that this algorithm-hardware co-design givesbetter tradeoff of gate-count and throughput than the existing ones andis a proper solution for the variable block size motion estimation inAVS.
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