Parallel Algorithm Core: A Novel IPSec Algorithm Engine for Both Exploiting Parallelism and Improving Scalability

To deal with the challenges of both \it computation-complexity and \italgorithm-scalability posed to the design of an IPSec engine, wedevelop PAC (parallel algorithm core), called PAC, employed in anIPSec engine, which can meet requirements of both exploiting parallelismexisting in IPSec packets and offering scalability in both the scalesand types of cryptographic algorithms. With three kinds of parallelismand two kinds of transparency defined, a novel hierarchy of thespecifically-designed parallel structure for PAC is presented, followedby corresponding mechanisms. With a simulation, thescalability of PAC is examined. For the purpose of performanceevaluation, a \it Quasi Birth-and-Death (QBD) process is thenestablished to model a simplified version of the proposed PAC.Performance evaluation of PAC in terms of two representative measures,throughput and mean packet waiting time, is numerically investigated. Acomparison study is done on a simulation basis. Conclusions are finallydrawn for providing a helpful guideline for both the design andimplementation of our proposal.