CMOS Design of Ternary Arithmetic Devices
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Abstract
This paper presents CMOS circuit designs of a ternary adder and a ternary multiplier,formulated using transmission function theory.Binary carry signals appearing in these designs allow conventional look-ahead carry techniques to be used.Compared with previous similar designs,the circuits proposed in this paper have advantages such as low dissipation,low output impedance,and simplicity of construction.
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