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Volume 7 Issue 1
January  1992
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Li Zhongcheng, Min Yinghua. Pseudo-Random Test Generation for Large Combinational Circuits[J]. Journal of Computer Science and Technology, 1992, 7(1): 19-28.
Citation: Li Zhongcheng, Min Yinghua. Pseudo-Random Test Generation for Large Combinational Circuits[J]. Journal of Computer Science and Technology, 1992, 7(1): 19-28.
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Pseudo-Random Test Generation for Large Combinational Circuits

  • CAD Laboratory Institute of Computing Technotogy; Academia Sinica; Beijng; CAD Laboratory; Institute of Computing Technotogy;

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  • Published Date: January 09, 1992
    Abstract
  • In this paper,a simulation system of pseudo-random testing is described first to investigate the characteristics of pseudo-random testing.Several interesting experimental results are obtained.It is found out that initial states of pseudo-random sequences have little effect on fault coverage.Fixed connection between LFSR outputs and circuit inputs in which the number of LFSR stages m is less than the number of circuit inputs n leads to low fault coverage,and the fault coverage is reduced as m decreases.The l…
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    • References (5)
  • [1]
    P.H.Bardell et al., Built-In Test for VLSI:Pseudorandom Techniques .Wiley Somerset,NJ,1987.
    [2]
    E.J.McCluskey, Logic Design Principles: With Emphasis on Testable Semicustom Circuits. Englewood Cliffs, NJ:Prentice-Hall, 1986.
    [3]
    K.D.Wagner et al., Pseudo-random testing .IEEE Trans. Corrput., 1987, C-36 (3), 332-343.
    [4]
    Y.K.Malaiya and S.Yang, The coverage problem for random testing. Proc.IEEE Int'l Test Conf., Nov.1984,237-245.
    [5]
    J.A.Waicukauski el al., Fault simulation for structured VLSI.VLSI Systems Iksign, 1985, 6(12), pp20. ………….
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