Verification of Systolic Array:An FP Functional Approach

There has been much interest in the use of formal techniques for the design and analysis of systolic arrays.One important aspect of analysis of systolic array is the correctness problem. A few attempts for the verification of systolic array have appeared in the literature. The deficiency is that all of these methods lack a straightforward way of proving correctness. They need either proposing a solution,then applying inductive techniques or showing that the array satisfies three types of properties:safety,l…