A New Synchronization Algorithm for VHDL-AMS Simulation

VHDL-AMS is the Analog and Mixed-SignalExtensions to VHDL. The paper gives a brief overview of the addedfeatures to VHDL. A mixed-signal simulator has been developed based onVHDL-AMS. A new synchronization algorithm is adopted in the simulator.Using the new algorithm the analog kernel does not need to synchronize thedigital kernel at each digital event time point. The efficiency of thenew synchronization algorithm is tested by examples. Simulation resultsshow the newly developed algorithm can speed up the simulation.