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肖斌, 张译夫, 高燕萍, 杨梁, 吴冬梅, 范宝峡. 一种健壮和高能效的65nm SOC物理实现方法[J]. 计算机科学技术学报, 2013, 28(4): 682-688. DOI: 10.1007/s11390-013-1368-7
引用本文: 肖斌, 张译夫, 高燕萍, 杨梁, 吴冬梅, 范宝峡. 一种健壮和高能效的65nm SOC物理实现方法[J]. 计算机科学技术学报, 2013, 28(4): 682-688. DOI: 10.1007/s11390-013-1368-7
Bin Xiao, Yi-Fu Zhang, Yan-Ping Gao, Liang Yang, Dong-Mei Wu, Bao-Xia Fan. A Robust and Power-Efficient SoC Implementation in 65nm[J]. Journal of Computer Science and Technology, 2013, 28(4): 682-688. DOI: 10.1007/s11390-013-1368-7
Citation: Bin Xiao, Yi-Fu Zhang, Yan-Ping Gao, Liang Yang, Dong-Mei Wu, Bao-Xia Fan. A Robust and Power-Efficient SoC Implementation in 65nm[J]. Journal of Computer Science and Technology, 2013, 28(4): 682-688. DOI: 10.1007/s11390-013-1368-7

一种健壮和高能效的65nm SOC物理实现方法

A Robust and Power-Efficient SoC Implementation in 65nm

  • 摘要: 龙芯2H是龙芯系列处理器中的第一款高复杂度的SOC芯片.它的芯片面积为117mm2, 采用65nm CMOS LP/GP 工艺生产,共包含1.52亿晶体管.它集成了主频达到1GHz的龙芯处理器核和丰富的高速或低速的外部接口模块. 为了克服深亚微米工艺设计中的在片波动问题,在时钟生成与分布的过程中采用了许多新的设计方法,以及集成了各类的PVT测试电路由于硅后调试.为了满足芯片在不同应用场景中的低功耗设计要求,设计中采用了多种工业上常用的方法,比如动态频率和电压调节,电源门控技术以及多电压域设计.

     

    Abstract: Godson2H is a complex SoC (System-on-Chip) of Godson series, which is a 117mm2, 152 million transistors chip fabricated in 65nm CMOS LP/GP process technology. It integrates a 1 GHz processor core and abundant high or low speed peripheral IO interfaces. To overcome on-chip-variation problems in deep submicron designs, many methods are adopted in clock tree, and PVT detectors are integrated for debug. To meet the low power constraints in different applications, most of state-of-the-art low power methods are used carefully, such as dynamic voltage and frequency scaling, power gating and aggressive multi-voltage design.

     

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