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Frank Yang. CFP: A Coherence-Free Processor Design[J]. Journal of Computer Science and Technology. DOI: 10.1007/s11390-023-3964-5
Citation: Frank Yang. CFP: A Coherence-Free Processor Design[J]. Journal of Computer Science and Technology. DOI: 10.1007/s11390-023-3964-5

CFP: A Coherence-Free Processor Design

  • This paper presents the design of a Coherence-Free Processor (CFP) that enables a scalable multiprocessor by eliminating cache coherence operations in both hardware and software. The CFP uses a Coherence-Free Cache (CFC) that can improve the cost-effectiveness and performance-effectiveness of the existing multiprocessors for commonly used workloads. The CFC is feasible because not all program data that resides in a multiprocessor cache needs to be accessed by other processors, and private caches at level 1 (L1) and level (2) facilitate this type of workloads. Reentrant programs are specifically designed to protect their data from modification by other tasks. Program data that is modified but not shared with other tasks does not require a coherence protocol. Adding processors reduces the multitasking queue; reducing elapsed time. Simultaneous replaces concurrent.
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