Cycle-Based Algorithm Used to Accelerate VHDL Simulation

Cycle-based algorithm has very high performance for the simulation of synchronous design, but it is confined to synchronous design and it is not asaccurate as event-driven algorithm. In this paper, a revised cycle-based algorithm isproposed and implemented in VHDL simulator. Event-driven simulation engine andcycle-based simulation engine have been imbedded in the same simulation environment and can be used to asynchronous design and synchronous design respectively.Thus the simulation performance is improved…