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The Methodology of Testability Prediction for Sequential Circuits
Xu Shiyi
,
G.P.Dias
1996, 11(6): 529-541.
Abstract
A Neural Network Appraoch to Fault Diagnosis in Analog Circuits
Wei Naihong
,
Yang Shiyuan
,
Tong Shibai
1996, 11(6): 542-550.
Abstract
Accelerated Techniques in Stem Fault Simulation
Shi Yin
,
Wei Daozheng
1996, 11(6): 551-561.
Abstract
The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT
Yan Zongfu
,
Liu Mingye
1996, 11(6): 562-569.
Abstract
Neural Networks for Omni-View Road Image Understanding
Zhu Zhigang
,
Xu Guangyou
1996, 11(6): 570-580.
Abstract
Speed up Training of the Recurrent Neural Network Based on Constrained optimization Techniques
Chen Ke
,
Bao Weiquan
,
Chi Huisheng
1996, 11(6): 581-588.
Abstract
DYNAMEM-A Microarchitecture for Improving Memory Disambiguation at Run-Time
Wang Xianzhu
,
Liao Heng
,
Li Sanli
1996, 11(6): 589-600.
Abstract
Research on Protocol Migration
Wang Yun
,
Gu Guanqun
,
Dui Jiyin
1996, 11(6): 601-606.
Abstract
Compact DC-DC Converter for Pocket Micro-Controller Systems
Liu Jian
,
Chen Zhiming
,
Zhong Yanru
,
Du Zhong
1996, 11(6): 607-614.
Abstract
The Global Properties of Valid Formulas in Modal Logic K
Sun Jigui
,
Cheng Xiaochun
,
Liu Xuhua
1996, 11(6): 615-621.
Abstract
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