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Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain
Yi-Ci Cai, Jin Shi, Zu-Ying Luo, Xian-Long Hong
2005, 20(2)
Abstract
Crosstalk-Aware Routing Resource Assignment
Hai-Long Yao, Yi-Ci Cai, Qiang Zhou, Xian-Long Hong
2005, 20(2)
Abstract
A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock
Yin-Shui Xia, Lun-Yao Wang, A. E. A. Almaini
2005, 20(2)
Abstract
Microarchitecture of the Godson-2 Processor
Wei-Wu Hu, Fu-Xin Zhang, Zu-Song Li
2005, 20(2)
Abstract
Analysis of Software Test Item Generation—Comparison Between High Skilled and Low Skilled Engineers
Masayuki Hirayama, Osamu Mizuno, Tohru Kikuno
2005, 20(2)
Abstract
Secure Two-Party Computational Geometry
Shun-Dong Li, Yi-Qi Dai
2005, 20(2)
Abstract
Implementation of Cryptosystems Based on Tate Pairing
Lei Hu, Jun-Wu Dong, Ding-Yi Pei
2005, 20(2)
Abstract
Extended Methodology of RS Design and Instances Based on GIP
Qian-Hong Wu, Bo Qin, Yu-Min Wang
2005, 20(2)
Abstract
RWBOA(Pd,w): Novel Backoff Algorithm for IEEE 802.11 DCF
Yun Li, Ke-Ping Long, Wei-Liang Zhao, Feng-Rui Yang
2005, 20(2)
Abstract
RSAD: A Robust Distributed Contention-Based Adaptive Mechanism for IEEE 802.11 Wireless LANs
Yong Peng, Shi-Duan Cheng, Jun-Liang Chen
2005, 20(2)
Abstract
Design and Verification of High-Speed VLSI Physical Design
Dian Zhou, Rui-Ming Li
2005, 20(2): 147-165.
Abstract
Efficient RT-Level Fault Diagnosis
Ozgur Sinanoglu, Alex Orailoglu
2005, 20(2): 166-174.
Abstract
VFSim: Concurrent Fault Simulation at Register Transfer Level
Li Shen
2005, 20(2): 175-186.
Abstract
Fault Diagnosis of Physical Defects Using Unknown Behavior Model
Xiao-Qing Wen, Hideo Tamamoto, Kewal K. Saluja, Kozo Kinoshita
2005, 20(2): 195-200.
Abstract
Delay Testing Viability of Gate Oxide Short Defects
J. M. Gallière, M. Renovell, F. Azais, Y. Bertrand
2005, 20(2): 201-209.
Abstract
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction
Yin-He Han, Xiao-Wei Li, Hua-Wei Li, Anshuman Chandra
2005, 20(2): 201-209.
Abstract
On Test Data Compression Using Selective Don t-Care Identification
Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase
2005, 20(2): 210-215.
Abstract
A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
Abdil Rashid Mohamed, Zebo Peng, Petru Eles
2005, 20(2): 216-223.
Abstract
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