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Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain
Crosstalk-Aware Routing Resource Assignment
A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock
Microarchitecture of the Godson-2 Processor
Analysis of Software Test Item Generation—Comparison Between High Skilled and Low Skilled Engineers
Secure Two-Party Computational Geometry
Implementation of Cryptosystems Based on Tate Pairing
Extended Methodology of RS Design and Instances Based on GIP
RWBOA(Pd,w): Novel Backoff Algorithm for IEEE 802.11 DCF
RSAD: A Robust Distributed Contention-Based Adaptive Mechanism for IEEE 802.11 Wireless LANs
Design and Verification of High-Speed VLSI Physical Design
Efficient RT-Level Fault Diagnosis
VFSim: Concurrent Fault Simulation at Register Transfer Level
Fault Diagnosis of Physical Defects Using Unknown Behavior Model
Delay Testing Viability of Gate Oxide Short Defects
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction
On Test Data Compression Using Selective Don t-Care Identification
A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
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