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Volume 25 Issue 2
March  2010
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Bao-Xia Fan, Liang Yang, Jiang-Mei Wang, Ru Wang, Bin Xiao, Ying Xu, Dong Liu, Ji-Ye Zhao. Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor[J]. Journal of Computer Science and Technology, 2010, 25(2): 192-199.
Citation: Bao-Xia Fan, Liang Yang, Jiang-Mei Wang, Ru Wang, Bin Xiao, Ying Xu, Dong Liu, Ji-Ye Zhao. Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor[J]. Journal of Computer Science and Technology, 2010, 25(2): 192-199.
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Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor

  • 1Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
    2Graduate University of Chinese Academy of Sciences, Beijing 100039, China
    3Loongson Technology, Corporation Limited, Beijing 100190, China

Funds: This work is supported by the National Basic Research 973 Program of China under Grant No. 2005CB321600, the National High Technology Research & Development 863 Program of China under Grant Nos. 2008AA110901, 2009AA01Z125 and 2007AA01Z114, and the National Natural Science Foundation of China under Grant Nos. 60803029, 60673146, 60736012.
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  • Author Bio:

    Bao-Xia Fan received the B.S. and M.S. degrees in powerengineering from Dalian University of Technology in 1998 and 2001,respectively. He is currently a Ph.D. candidate in the Institute ofComputing Technology, Chinese Academy of Sciences, Beijing, China. Hisresearch interests include on-chip variation analysis and optimization,design methodology for high performance processor.

    Liang Yang received the B.S. degree incomputer science and technology from University of Science andTechnology of China, Hefei, in 2004. He is currently pursuingthe Ph.D. degree in the Institute of Computing Technology, ChineseAcademy of Sciences, Beijing. His current research interestsinclude clock distribution network, interconnect modeling and highperformance and low power design.

    Jiang-Mei Wang received the B.S. Eng. degree in radio project fromHarbin Institute of Technology, Harbin, in 1995. She is currentlyworking as a P&R engineer of Loongson CPU series chip in the Instituteof Computing Technology, Chinese Academy of Sciences, Beijing.Her research interests include deep submicron physical design.

    Ru Wang received her B.S. degree from the University of Scienceand Technology of China in 2005, majored in electronic science andtechnology. She is currently a Ph.D. candidate of the Institute ofComputing Technology, the Chinese Academy of Sciences, Beijing, China.Her research interests include chip power analysis and low powertechniques for high performance processors.

    Bin Xiao received the B.S. degree in electronic and electricfrom Peking University, Beijing, in 2006. He is currently working forPh.D. degree in computing architecture at Institute of ComputingTechnology, Chinese Academy of Sciences, Beijing, China. His researchinterests include deep submicron physical design.

    Ying Xu is currently a Master candidate in computingarchitecture at Institute of Computing Technology, Chinese Academy ofSciences, Beijing, China. Her research interests include deep submicronphysical design.

    Dong Liu received his M.S. degree in microelectronics and solidelectronics from the Sun Yat-Sen University, China, in 2006. Since2006, he has worked at Microprocessor Technology Research Center ofInstitute of Computing Technology. His current research interestsinclude physical design for high performance processor, and designmethodology of SOC design.

    Ji-Ye Zhao received his M.S. degree in power engineering from theDalian University of Technology, China, in 2001. Since 2001, he hasbeen with the Godson CPU Design Group for developing the highperformance general microprocessor. His current research interestsinclude physical design for high performance processor, and designmethodology of SOC design.

  • Received Date: March 29, 2009
  • Revised Date: November 04, 2009
  • Published Date: March 04, 2010
    Abstract
  • The Godson-3A microprocessor is a quad-core version of the scalable Godson-3 multi-core series. It is physically implemented based on the 65nm CMOS process. This 174mm2 chip consists of 425 million transistors. The maximum frequency is 1GHz with a maximum power consumption of 15W. The main challenges of Godson-3A physical implementation include very large scale, high frequency requirement, sub-micron technology effects and aggressive time schedule. This paper describes the design methodology of the physical implementation of Godson-3A, with particular emphasis on design methods for high frequency, clock tree design, power management, and on-chip variation (OCV) issue.
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    • References (12)
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