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Yan Zongfu, Liu Mingye. The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT[J]. Journal of Computer Science and Technology, 1996, 11(6): 562-569.
Citation:
Yan Zongfu, Liu Mingye. The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT[J]. Journal of Computer Science and Technology, 1996, 11(6): 562-569.
Yan Zongfu, Liu Mingye. The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT[J]. Journal of Computer Science and Technology, 1996, 11(6): 562-569.
Citation:
Yan Zongfu, Liu Mingye. The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT[J]. Journal of Computer Science and Technology, 1996, 11(6): 562-569.
The RTL Binding and Mapping Approach of VHDL High-Level Synthesis System HLS/BIT
This paper describes a VHDL high-level synthesis system HLS/BIT with emphasis on its register-transfer level (RTL) binding and technology mapping subsystem. In more detail, the component instantiation mechanism and the knowledge-driven approach to RTL technology mapping are also presented.
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